A semiconductor package may comprise one or more semiconductor dies that are attached to a substrate. A die may be both electrically and mechanically coupled to a substrate using, for example, a flip-chip interconnect technique or by wirebonding in conjunction with a die-attach adhesive. During manufacture (and perhaps use), a semiconductor die may be susceptible to warpage, and such warpage may, for example, lead to inconsistent interconnect formation between a die and a substrate and/or to delamination between the die and substrate. Several factors may impact the extent of any die warpage, including the thickness of the die, processing temperatures (e.g. during solder reflow), differences in coefficient of thermal expansion (CTE) between the die and substrate, as well as other factors.